Vertically Integrated Nanowires on Si Wafers and Into Circuits-Reference-Cited by-同舟云学术

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Vertically Integrated Nanowires on Si Wafers and Into Circuits

Published:2023-03 Issue:3 Volume:59 Page:1-5
ISSN:0018-9464
Container-title:IEEE Transactions on Magnetics
language:
Short-container-title:IEEE Trans. Magn.

Author:

Harpel Allison¹^ORCID,Um Joseph²^ORCID,Dave Aditya²,Zhang Yali²^ORCID,Mahjabeen Nikita³^ORCID,Chen Yicong¹^ORCID,Henderson Rashaunda³^ORCID,Franklin Rhonda²,Stadler Bethanie J. H.²^ORCID

Affiliation:

1. Department of Chemical Engineering and Materials Science, University of Minnesota, Minneapolis, MN, USA

2. Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA

3. Department of Electrical and Computer Engineering, The University of Texas at Dallas, Dallas, TX, USA

Funder

NSF

Air Force Office of Scientific Research

Semiconductor Research Corporation. Portions of this work were conducted in the Minnesota Nano Center and Characterization Facilities at the UMN

NSF through the National Nanotechnology Coordinated Infrastructure

NSF through the MRSEC

NNCI

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://ieeexplore.ieee.org/ielam/20/10053568/9944070-aam.pdf

Reference11 articles.

1. NIH Image to ImageJ: 25 years of image analysis

2. 180 GHz Low-loss Copper Nanowire CPW Interconnects

3. Porous alumina thin films on conductive substrates for templated 1-dimensional nanostructuring

4. Size-dependent resistivity of metallic wires in the mesoscopic range

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