A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing
Author:
Affiliation:
1. INVIA,Meyreuil,France
2. LIRMM - University of Montpellier / CNRS,Montpellier,France
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9810327/9810358/09810364.pdf?arnumber=9810364
Reference23 articles.
1. Anti-tamper JTAG TAP design enables DRM to JTAG registers and P1687 on-chip instruments
2. Fine-Grained Access Management in Reconfigurable Scan Networks
3. SHA-3 Standard: Permutation-Based Hash and Extendable-Output Functions
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