Hardware Security Analysis of Arbiters: Trojan Modeling and Formal Verification
Author:
Affiliation:
1. Ain Shams Univeristy,Computer and Systems Engineering,Cairo,Egypt
2. Electronics Research Institute,Microelectronics Department,Cairo,Egypt
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10321814/10321836/10321908.pdf?arnumber=10321908
Reference17 articles.
1. Modelling and Analysis of Confluence Attack by Hardware Trojan in NoC
2. Security Measures Against a Rogue Network-on-Chip
3. Probabilistic Hardware Trojan Attacks on Multiple Layers of Reconfigurable Network Infrastructure
4. FPGA Based Implementation of a Floating Point Multiplier and its Hardware Trojan Models
5. A Hardware Trojan Attack on FPGA-Based Cryptographic Key Generation: Impact and Detection
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