Author:
Mirkhani S.,Lavasani M.,Navabi Z.
Cited by
12 articles.
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1. Thread-level Parallelism in Fault Simulation of Deep Neural Networks on Multi-Processor Systems;2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2022-10-19
2. Software Product Reliability Based on Basic Block Metrics Recomposition;2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS);2022-09-12
3. High-Performance Parallel Fault Simulation for Multi-Core Systems;2021 29th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP);2021-03
4. Assessing the impact of timing errors on HPC applications;Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis;2019-11-17
5. SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems;IEEE Transactions on Computers;2019-05-01