Modeling and Analysis of On-Chip Power Noise Induced by an On-Chip Linear Voltage Regulator Module With a High-Speed Output Buffer

Author:

Kim HeegonORCID,Cho JonghyunORCID,Yoon ChangwookORCID,Achkir BriceORCID,Drewniak JamesORCID,Fan JunORCID

Funder

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Atomic and Molecular Physics, and Optics

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A low output ripple and high security on‐chip voltage regulation based on Fourier transform;International Journal of Circuit Theory and Applications;2023-02-22

2. An RF Amplifier Circuit for Enhancement of Echo Signal Detection in Bathymetric LiDAR;IEEE Sensors Journal;2022-11-01

3. Establishing the EMC Model of a Three-Terminal Voltage Regulator Based on Electrical Characteristic;2022 IEEE International Conference on Mechatronics and Automation (ICMA);2022-08-07

4. Modeling of Power Supply Noise Associated with Package Parasitics in an On-Chip LDO Regulator;2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium;2021-07-26

5. Analysis of Power Supply Induced Jitter of High Speed Output Buffer with On-Die Low-Dropout Voltage Regulator;2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium;2021-07-26

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