FinCACTI: Architectural Analysis and Modeling of Caches with Deeply-Scaled FinFET Devices-Reference-Cited by-同舟云学术

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FinCACTI: Architectural Analysis and Modeling of Caches with Deeply-Scaled FinFET Devices

Published:2014-07 Issue: Volume: Page:
ISSN:
Container-title:2014 IEEE Computer Society Annual Symposium on VLSI
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Author:

Shafaei Alireza,Wang Yanzhi,Lin Xue,Pedram Massoud

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6901614/6903314/06903378.pdf?arnumber=6903378

Cited by 43 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. TREAFET: Temperature-Aware Real-Time Task Scheduling for FinFET based Multicores;ACM Transactions on Embedded Computing Systems;2024-06-29

2. CLAY: CXL-based Scalable NDP Architecture Accelerating Embedding Layers;Proceedings of the 38th ACM International Conference on Supercomputing;2024-05-30

3. AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2024-04-27

4. Lightening-Transformer: A Dynamically-Operated Optically-Interconnected Photonic Transformer Accelerator;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02

5. ZEC ECC: A Zero-Byte Eliminating Compression-Based ECC Scheme for DRAM Reliability;IEEE Access;2024

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