Author:
Chiang Yu-Xiang,Tai Cheng-Wei,Fang Shang-Rong,Peng Kai-Chun,Chung Yuan-Dar,Yang Jin-Kai,Lin Rung-Bin
Cited by
8 articles.
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1. NS3K: A 3-nm Nanosheet FET Standard Cell Library Development and its Impact;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-02
2. A Comprehensive Study on the Design Methodology of Level Shifter Circuits;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-01
3. Improving Pin Accessibility of Standard Cell Libraries in 7nm Technology;2022 23rd International Symposium on Quality Electronic Design (ISQED);2022-04-06
4. Pin-Accessible Legalization for Mixed-Cell-Height Circuits;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-01
5. Multi-Objective Digital Design Optimization via Improved Drive Granularity Standard Cells;IEEE Transactions on Circuits and Systems I: Regular Papers;2021-11