FEEP: Functional ECO Synthesis with Efficient Patch Minimization

Author:

Liu Yaotian1,Zhang Yuhang1,Zhang Qing1,Chen Rui2,Li Yongfu1

Affiliation:

1. Shanghai Jiao Tong University,Department of Micro-Nano Electronics and MoE Key Lab of Artificial Intelligence,Shanghai,China

2. Chinese Academy of Sciences,Institute of Microelectronics,Beijing,China

Funder

National Science Foundation

Publisher

IEEE

Reference31 articles.

1. Efficient computation of ECO patch functions;dao;Proceedings of Design Automation Conference (DAC),2018

2. Multi-patch generation for multi-error logic rectification by interpolation with cofactor reduction;tang;Proceedings of Design Automation and Test in Europe Conference and Exhibition (DATE),2012

3. High-Level Engineering Change Through Programmable Datapath and SMT Solvers

4. Cost-aware patch generation for multi-target function rectification of engineering change orders;zhang;Proceedings of Design Automation Conference (DAC),2018

5. A neutral netlist of 10 combinational benchmark circuits and a target translator in Fortran;brglez;Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS),1985

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1. Design of a Reconfigurable Multifunctional Standard Cell for Engineering Change Order;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024

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