NeuSB: A Scalable Interconnect Architecture for Spiking Neuromorphic Hardware-Reference-Cited by-同舟云学术

NeuSB: A Scalable Interconnect Architecture for Spiking Neuromorphic Hardware

Published:2023-04-01 Issue:2 Volume:11 Page:373-387
ISSN:2168-6750
Container-title:IEEE Transactions on Emerging Topics in Computing
language:
Short-container-title:IEEE Trans. Emerg. Topics Comput.

Author:

Balaji Adarsha¹^ORCID,Huynh Phu Khanh¹,Catthoor Francky²^ORCID,Dutt Nikil D.³^ORCID,Krichmar Jeffrey L.³^ORCID,Das Anup¹^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA

2. IMEC, KU, Leuven, Belgium

3. Department of Cognitive Science, University of California, Irvine, CA, USA

Funder

U.S. Department of Energy

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computer Science Applications,Human-Computer Interaction,Information Systems,Computer Science (miscellaneous)

Link

https://ieeexplore.ieee.org/ielam/6245516/10144811/10026801-aam.pdf

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