An nMOS VLSI process for fabrication of a 32-bit CPU chip-Reference-Cited by-同舟云学术

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An nMOS VLSI process for fabrication of a 32-bit CPU chip

Published:1981-10 Issue:5 Volume:16 Page:542-547
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Mikkelson J.M.,Hall L.A.,Malhotra A.K.,Seccombe S.D.,Wilson M.S.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/22579/01051635.pdf?arnumber=1051635

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Coupling and crosstalk between high speed interconnects in ultralarge scale integrated circuits;IEEE Journal of Quantum Electronics;1992-06

2. Lateral Surface Superlattices and the Future of ULSI Microelectronics;Granular Nanoelectronics;1991

3. In-line statistical process control and feedback for VLSI integrated circuit manufacturing;IEEE Transactions on Components, Hybrids, and Manufacturing Technology;1990

4. Multilevel metal interconnection utilizing CVD tungsten and liftoff processing;Journal of Electronic Materials;1990-01

5. Architectures and Devices for ULSI;Frontiers of Computing Systems Research;1990

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