A Verilog-A model for the design of devices for fluorescence life-time measurement with CMOS SPADs-Reference-Cited by-同舟云学术

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A Verilog-A model for the design of devices for fluorescence life-time measurement with CMOS SPADs

Published:2015-09 Issue: Volume: Page:
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Container-title:2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
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Author:

Dieguez A.,Alonso O.,Vilella E.,Vila A.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7297766/7301673/07301680.pdf?arnumber=7301680

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comparative Analysis of SPAD Models for Low-Light Imaging;2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2023-11-19

2. A 72-bin in-pixel mixed-signal TDC for SPAD-based fluorescence lifetime measurements;2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS);2022-11-16

3. Photocurrent Characteristics of Gate/Body-Tied MOSFET-Type Photodetector with High Sensitivity;JOURNAL OF SENSOR SCIENCE AND TECHNOLOGY;2022-01-31

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