A 6.75 mW $+$ 12.45 dBm IIP3 1.76 dB NF 0.9 GHz CMOS LNA Employing Multiple Gated Transistors With Bulk-Bias Control-Reference-Cited by-同舟云学术

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A 6.75 mW $+$ 12.45 dBm IIP3 1.76 dB NF 0.9 GHz CMOS LNA Employing Multiple Gated Transistors With Bulk-Bias Control

Published:2011-11 Issue:11 Volume:21 Page:616-618
ISSN:1531-1309
Container-title:IEEE Microwave and Wireless Components Letters
language:
Short-container-title:IEEE Microw. Wireless Compon. Lett.

Author:

Jin Tae Hwan,Kim Tae Wook

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics

Link

http://xplorestaging.ieee.org/ielx5/7260/6069692/06034540.pdf?arnumber=6034540

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2. Design of High Linearity Inductor-Less Active CMOS Mixer Based on Volterra Series Analysis;Circuits, Systems, and Signal Processing;2020-04-08

3. A Low-Power Low-Noise Decade-Bandwidth Switched Transconductor Mixer With AC-Coupled LO Buffers;IEEE Transactions on Circuits and Systems I: Regular Papers;2018-02

4. An IIP3 enhancement technique for CMOS active mixers with a source-degenerated transconductance stage;Microelectronics Journal;2016-04

5. Using the Gate–Bulk Interaction and a Fundamental Current Injection to Attenuate IM3 and IM2 Currents in RF Transconductors;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2016-01

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