A 57–78 GHz Frequency Tripler MMIC in 65-nm CMOS

Author:

Lee You-Tang,Hsiao Yuan-Hung,Wang Huei

Funder

MOST

NTU Excellent Research

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics

Cited by 30 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 195–244 GHz CMOS self-mixing frequency tripler with >23 dBc fundamental rejection;AEU - International Journal of Electronics and Communications;2024-08

2. Ultra-Low Power 60 GHz Class-C Frequency Tripler in 22-nm FDSOI CMOS Technology;2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS);2024-02-27

3. Highly Efficient Differential Frequency Doubler With Output Resistance Boosting Feedback;IEEE Journal of Solid-State Circuits;2024-02

4. A 276–312-GHz (×12) Frequency Multiplier Chain With Milliwatt Level Output Power in 65-nm CMOS Technology;IEEE Microwave and Wireless Technology Letters;2023-11

5. An Efficient V-Band Frequency Tripler With Back-to-Back Connected Varactors;IEEE Microwave and Wireless Technology Letters;2023-08

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