On the Single Event Upset Vulnerability and Mitigation of Binarized Neural Networks on FPGAs
Author:
Affiliation:
1. UNSW,School of Computer Science and Engineering,Sydney,Australia
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9786061/9786064/09786099.pdf?arnumber=9786099
Reference4 articles.
1. Low-Power Neural Networks for Semantic Segmentation of Satellite Images
2. An FPGA-Based Hybrid Neural Network Accelerator for Embedded Satellite Image Classification
3. Designing and testing fault-tolerant techniques for SRAM-based FPGAs
4. FP-BNN: Binarized neural network on FPGA;liang;Neurocomputing,2018
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Tradeoff Between Performance and Reliability in FPGA Accelerated DNNs for Space Applications;2023 European Data Handling & Data Processing Conference (EDHPC);2023-10-02
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