A 2.25 TOPS/W Fully-Integrated Deep CNN Learning Processor with On-Chip Training-Reference-Cited by-同舟云学术

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A 2.25 TOPS/W Fully-Integrated Deep CNN Learning Processor with On-Chip Training

Published:2019-11 Issue: Volume: Page:
ISSN:
Container-title:2019 IEEE Asian Solid-State Circuits Conference (A-SSCC)
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Author:

Lu Cheng-Hsun,Wu Yi-Chung,Yang Chia-Hsiang

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9043348/9056889/09056967.pdf?arnumber=9056967

Cited by 20 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. Design principles for lifelong learning AI accelerators;Nature Electronics;2023-11-16

3. High-Precision Method and Architecture for Base-2 Softmax Function in DNN Training;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-08

4. Conclusion;Towards Heterogeneous Multi-core Systems-on-Chip for Edge Machine Learning;2023-07-03

5. ACBN: Approximate Calculated Batch Normalization for Efficient DNN On-Device Training Processor;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-06

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