Weight-Aware Activation Mapping for Energy-Efficient Convolution on PIM Arrays
Author:
Affiliation:
1. Sungkyunkwan University,Department of Electrical and Computer Engineering,Suwon,Korea
2. Sungkyunkwan University,Department of Artificial Intelligence,Suwon,Korea
Funder
National Research Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10244176/10244185/10244618.pdf?arnumber=10244618
Reference12 articles.
1. A Ternary Based Bit Scalable, 8.80 TOPS/W CNN accelerator with Many-core Processing-in-memory Architecture with 896K synapses/mm2;okumura;2019 Symposium on VLSI Circuits,0
2. Optimizing Weight Mapping and Data Flow for Convolutional Neural Networks on Processing-in-Memory Architectures
3. VWC-SDK: Convolutional Weight Mapping Using Shifted and Duplicated Kernel With Variable Windows and Channels
4. Technology-design Co-optimization of Resistive Cross-point Array for Accelerating Learning Algorithms on Chip
5. Efficient and Robust RRAM-Based Convolutional Weight Mapping With Shifted and Duplicated Kernel
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. ConvMapSim: Modeling and Simulating Convolutional Weight Mapping for PIM Arrays;2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS);2024-04-22
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