Hybrid-Domain In-Memory Polynomial Acceleration based on 40nm RRAM Multi-Core Chip for Machine Vision Calibration-Reference-Cited by-同舟云学术

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Hybrid-Domain In-Memory Polynomial Acceleration based on 40nm RRAM Multi-Core Chip for Machine Vision Calibration

Published:2023-12-09 Issue: Volume: Page:1-4
ISSN:
Container-title:2023 International Electron Devices Meeting (IEDM)
language:
Short-container-title:

Author:

Bao Lin¹,Wang Zongwei¹,Wang Qishen¹,Yang Yuhang¹,Gao Yi¹,Shan Linbo¹,Sun Jingwei¹,Yang Yunfan¹,Ling Yaotian¹,Zhang Haisu¹,Wang Cuimei¹,Xiao Han¹,Ye Le¹,Guo Ao²,Shen Ling²,Gu Wenbing²,Feng Gaoming²,Li Chen²,Chen Shoumian²,Zhao Yuhang²,Huang Shanguo³,Cai Yimao¹,Huang Ru¹

Affiliation:

1. Beijing Advanced Innovation Center for Integrated Circuits, Peking University,School of Integrated Circuits,Beijing,China

2. ICRD,Shanghai,China

3. Beijing University of Posts and Telecommunications,State Key Laboratory of Information Photonics and Optical Communications,Beijing,China

Funder

Nova

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10413659/10413660/10413781.pdf?arnumber=10413781

Reference10 articles.

1. Field-Programmable System-on-Chip-Based Control System for Real-Time Distortion Correction in Optical Imaging

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