A 120-mm/sup 2/ 64-Mb NAND flash memory achieving 180 ns/Byte effective program speed-Reference-Cited by-同舟云学术

A 120-mm/sup 2/ 64-Mb NAND flash memory achieving 180 ns/Byte effective program speed

Published:1997-05 Issue:5 Volume:32 Page:670-680
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Jin-Ki Kim ,Sakui K.,Sung-Soo Lee ,Itoh Y.,Suk-Chon Kwon ,Kanazawa K.,Ki-Jun Lee ,Nakamura H.,Kang-Young Kim ,Himeno T.,Jang-Rae Kim ,Kanda K.,Tae-Sung Jung ,Oshima Y.,Kang-Deog Suh ,Hashimoto K.,Sung-Tae Ahn ,Miyamoto J.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx1/4/12357/00568831.pdf?arnumber=568831

Cited by 21 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. High-Precision and Low-Power Offset Canceling Tri-State Sensing Latch in NAND Flash Memory;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-07

2. Irradiation Effects on Power and Timing Characteristics of Commercial 3-D NAND Flash Memories;2023 IEEE Radiation Effects Data Workshop (REDW) (in conjunction with 2023 NSREC);2023-07

3. All-Bit-Line Read Scheme With Locking Bit-Line and Amplifying Sense Node in NAND Flash;IEEE Access;2021

4. Modeling and simulation of NAND flash memory sensing systems with cell-to-cell V th variations;Proceedings of the 39th International Conference on Computer-Aided Design;2020-11-02

5. Multitoken-Based Power Management for NAND Flash Storage Devices;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-10