Demystifying the Nvidia Ampere Architecture through Microbenchmarking and Instruction-level Analysis

Author:

Abdelkhalik Hamdy1,Arafa Yehia1,Santhi Nandakishore2,Badawy Abdel-Hameed A.1

Affiliation:

1. Klipsch School of ECE, New Mexico State University

2. Los Alamos National Laboratory,Information Sciences Group

Publisher

IEEE

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Kernel fusion in atomistic spin dynamics simulations on Nvidia GPUs using tensor core;Journal of Computational Science;2024-09

2. High-Utilization GPGPU Design for Accelerating GEMM Workloads: An Incremental Approach;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

3. ngAP: Non-blocking Large-scale Automata Processing on GPUs;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1;2024-04-17

4. ConvStencil: Transform Stencil Computation to Matrix Multiplication on Tensor Cores;Proceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming;2024-02-20

5. Predicting GPU Kernel’s Performance on Upcoming Architectures;Lecture Notes in Computer Science;2024

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