Author:
Jagadeesh P.,Ravi S.,Mallikarjun Kittur Harish
Cited by
10 articles.
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3. An efficient multi-format low-precision floating-point multiplier;Sustainable Computing: Informatics and Systems;2024-01
4. A 64 BIT MAC Unit Design based on FPGA Using Vedic Multiplier;2023 Global Conference on Information Technologies and Communications (GCITC);2023-12-01
5. Power Effective Multiply Accumulation Configuration For Low Power Applications Using Modified Parallel Prefix Adders;2023 International Conference on Applied Intelligence and Sustainable Computing (ICAISC);2023-06-16