Author:
Benso A.,Chiusano S.,Di Natale G.,Prinetto P.,Bodoni M.L.
Cited by
6 articles.
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1. Reducing Power Dissipation in Memory Repair for High Fault Rates;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12
2. Iterative Diagnosis Approach for ECC-Based Memory Repair;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-02
3. Test Algorithms for ECC-Based Memory Repair in Ultimate CMOS and Post-CMOS;IEEE Transactions on Computers;2016-07-01
4. An Optimal Memory BISR Implementation;Journal of Computers;2013-09-01
5. Optimizing BIST and repair logic for embedded memories;2008 51st Midwest Symposium on Circuits and Systems;2008-08