Switched Capacitor MLI Design Ideology with Less number of Switches using Hysteresis Bandwidth Control-Reference-Cited by-同舟云学术

Switched Capacitor MLI Design Ideology with Less number of Switches using Hysteresis Bandwidth Control

Published:2022-12-16 Issue: Volume: Page:
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Container-title:2022 IEEE International Power and Renewable Energy Conference (IPRECON)
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Author:

S Saahithi¹,C N Raghu¹,Reddy Jyotheeswara¹,Dash Ritesh¹,Subburaj Vivekanandan²

Affiliation:

1. School of EEE, REVA University,Bengaluru,India

2. National Institute of Technology,Department of Electrical and Electronics Engineering,Silchar,Assam,India

Publisher

IEEE

Link

Reference23 articles.

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Fibonacci Series Based 21 Level Switched Capacitor Inverter Topology Using Hysteresis Band;2023 Annual International Conference on Emerging Research Areas: International Conference on Intelligent Systems (AICERA/ICIS);2023-11-16

2. Simulation of Switched Capacitor-Based Five-Level Inverter with PDPWM Control Technique;2023 International Conference on Advanced & Global Engineering Challenges (AGEC);2023-06-23