An improved design of virtual output impedance loop for droop-controlled parallel three-phase voltage source inverters-Reference-Cited by-同舟云学术

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An improved design of virtual output impedance loop for droop-controlled parallel three-phase voltage source inverters

Published:2012-09 Issue: Volume: Page:
ISSN:
Container-title:2012 IEEE Energy Conversion Congress and Exposition (ECCE)
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Author:

Wang Xiongfei,Blaabjerg Frede,Chen Zhe

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6331795/6342155/06342404.pdf?arnumber=6342404

Cited by 24 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Suppressing Synchronization Inrush in a VSI Based 3-Phase Standalone Micro-grid;2023 11th National Power Electronics Conference (NPEC);2023-12-14

2. Grid-Forming Converter and Stability Aspects of Renewable-Based Low-Inertia Power Networks: Modern Trends and Challenges;Arabian Journal for Science and Engineering;2023-11-09

3. ESOGI-Based Virtual Impedance Control Scheme with Performance Improvement for Droop-Operated Three-Phase VSIs in Islanded AC Microgrid;2023 1st International Conference on Renewable Solutions for Ecosystems: Towards a Sustainable Energy Transition (ICRSEtoSET);2023-05-06

4. Influence of output impedance of an inverter on its droop control strategies in a microgrid;Indian Journal of Engineering and Materials Sciences;2022

5. Mitigating Circulating Currents in Islanded AC Microgrids;2021 National Power Electronics Conference (NPEC);2021-12-15

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