Fabrication and Statistical Analysis of Large-Scale ZnO NW Based Synaptic Transistors
Author:
Affiliation:
1. James Watt School of Engineering, University of Glasgow,UK,G12 8QQ
2. Northeastern University,Bendable Electronics and Sustainable Technologies (BEST) Group,Department of Electrical and Computer Engineering,Boston,MA,USA,02115
Funder
Engineering and Physical Sciences Research Council (EPSRC)
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10220342/10220218/10220358.pdf?arnumber=10220358
Reference21 articles.
1. Impact of Synaptic Device Variations on Classification Accuracy in a Binarized Neural Network
2. Neuro-inspired electronic skin for robots
3. Engineering Complex Synaptic Behaviors in a Single Device: Emulating Consolidation of Short-term Memory to Long-term Memory in Artificial Synapses via Dielectric Band Engineering
4. System-Level Simulation of Hardware Spiking Neural Network Based on Synaptic Transistors and I&F Neuron Circuits
5. Mimicking Neurotransmitter Release in Chemical Synapses via Hysteresis Engineering in MoS2 Transistors
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