An optimized layout with low parasitic inductances for GaN HEMTs based DC-DC converter
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7097563/7104313/07104463.pdf?arnumber=7104463
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Comparison between State of Art Performance of GaN and SiC Converters for Electric Vehicle Application;SAE Technical Paper Series;2024-01-16
2. Effects of Parasitic Elements in High Frequency GaN-based DC-DC Converters for Electric Vehicle Applications;2023 25th International Multitopic Conference (INMIC);2023-11-17
3. Optimization Study for the Influence of Parasitic Parameters in Aerospace Power Supply Based on GaN;2023 IEEE 2nd International Power Electronics and Application Symposium (PEAS);2023-11-10
4. Continuous Operation of a Half-Bridge with Multi-Parallel GaN Power Devices for Increased Current Capability;IEEJ Journal of Industry Applications;2023-07-01
5. An Actively Balanced Distributed Regenerative Snubber with Reduced Part Count in Multi-Level Power Converters;2022 IEEE Energy Conversion Congress and Exposition (ECCE);2022-10-09
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