Author:
Ahmed Nisar,Tehranipoor Mohammad,Jayaram Vinay
Cited by
9 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Quantifiable Assurance in Hardware;Hardware Security;2024
2. Metrics for SoC Security Verification;CAD for Hardware Security;2023
3. CAD for Anti-counterfeiting;CAD for Hardware Security;2023
4. Fault-Tolerant Circuits;Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design;2023
5. Circuit Path Grading Considering Layout, Process Variations, and Cross Talk;Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits;2017-12-19