Optimization of the aspect ratio to enhance the power and noise-margin of a standard 6T(S6T)-SRAM cell-Reference-Cited by-同舟云学术

Optimization of the aspect ratio to enhance the power and noise-margin of a standard 6T(S6T)-SRAM cell

Published:2022-12-26 Issue: Volume: Page:
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Container-title:2022 Fourth International Conference on Emerging Research in Electronics, Computer Science and Technology (ICERECT)
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Author:

Bhavani Saranga¹,Gupta Lipika²,Sachdeva Ashish³,Sharma Tripti¹

Affiliation:

1. Chandigarh University,Department of Electronics & Communication Engineering,Mohali,India

2. Chitkara University Institute of Engineering and Technology, Chitkara University,Department of Electronics & Communication Engineering,Punjab,India

3. Chitkara University Institute of Engineering and Technology, Chitkara University,Punjab,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10059463/10059582/10060859.pdf?arnumber=10060859

Reference31 articles.

1. Design of a stable single sided l lt static random access memory cell with improved critical charge;sachdeva;International Journal of Numerical Modelling Electronic Networks Devices and Fields,2022

2. A 3-GHz 70-Mb SRAM in 65-nm CMOS Technology With Integrated Column-Based Dynamic Power Supply

3. Characterization of a novel nine-transistor sram cell;liu;IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2008

4. A Discussion on SRAM Circuit Design Trend in Deeper Nanometer-Scale Technologies

5. A Sub-Threshold 8T SRAM Macro with 12.29 nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs

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