Tunnel Magnetoresistance Based Passive Resistance Replacement in Hybrid MTJ-CMOS Integration-Reference-Cited by-同舟云学术

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Tunnel Magnetoresistance Based Passive Resistance Replacement in Hybrid MTJ-CMOS Integration

Published:2022 Issue: Volume:21 Page:638-647
ISSN:1536-125X
Container-title:IEEE Transactions on Nanotechnology
language:
Short-container-title:IEEE Trans. Nanotechnology

Author:

Wu Yu-ang¹,Xie Xinshu¹,Tong Xinfang¹,Di Yantong¹,Naviner Lirida²^ORCID,Liu Bo¹^ORCID,Xiao Jian³^ORCID,Cai Hao¹^ORCID

Affiliation:

1. National ASIC System Engineering Center, School of Electronic Science and Engineering, Southeast University, Nanjing, China

2. Télécom Paris, Institut Polytechnique de Paris, Palaiseau, France

3. Nanjing University of Posts and Telecommunications, Nanjing, China

Funder

National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Science Applications

Link

http://xplorestaging.ieee.org/ielx7/7729/9682520/09927281.pdf?arnumber=9927281

Reference31 articles.

1. High-Value Tunable Pseudo-Resistors Design

2. Realization of a Sub 10-nm Silicene Magnetic Tunnel Junction and Its Application for Magnetic Random Access Memory and Digital Logic

3. NAND-SPIN-Based processing-in-MRAM architecture for convolutional neural network acceleration;zhao;Sci China Inform Sci,2022

4. Proposal of Analog In-Memory Computing With Magnified Tunnel Magnetoresistance Ratio and Universal STT-MRAM Cell

5. Compact Modeling of Perpendicular-Magnetic-Anisotropy Double-Barrier Magnetic Tunnel Junction With Enhanced Thermal Stability Recording Structure

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