Gate-all-around Si-nanowire CMOS inverter logic fabricated using top-down approach-Reference-Cited by-同舟云学术

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Gate-all-around Si-nanowire CMOS inverter logic fabricated using top-down approach

Published:2007 Issue: Volume: Page:
ISSN:
Container-title:ESSDERC 2007 - 37th European Solid State Device Research Conference
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Author:

Buddharaju K. D.,Singh N.,Rustagi S. C.,Teo Selin H. G.,Wong L. Y.,Tang L. J.,Tung C. H.,Lo G. Q.,Balasubramanian N.,Kwong D. L.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4430869/4430870/04430938.pdf?arnumber=4430938

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