Simulating the impact of pattern-dependent poly-CD variation on circuit performance

Author:

Stine B.E.,Boning D.S.,Chung J.E.,Ciplickas D.J.,Kibarian J.K.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Effect of Regularity-Enhanced Layout on Variability and Circuit Performance of Standard Cells;IPSJ Transactions on System LSI Design Methodology;2010

2. Layout optimization based on a generalized process variability model;SPIE Proceedings;2008-03-14

3. Leakage Minimization of Digital Circuits Using Gate Sizing in the Presence of Process Variations;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2008-03

4. Line edge roughness impact on critical dimension variation;SPIE Proceedings;2007-03-16

5. Pattern matching, simulation, and metrology of complex layouts fabricated by electron beam lithography;Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures;2007

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