FPGA implemented reduced Ethernet MAC
Author:
Suto Jozsef,Oniga Stefan
Cited by
3 articles.
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1. Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation;International Journal of Reconfigurable Computing;2023-05-23
2. An Optimized Packet Transceiver Design for Ethernet-MAC Layer Based on FPGA;International Conference on Intelligent Data Communication Technologies and Internet of Things (ICICI) 2018;2018-12-21
3. Design of an Enhanced 10Gb/s Ethernet MAC Controller for DCB Offloading on FPGA;2015 International Conference on Network and Information Systems for Computers;2015-01