1. Redesign and Verification of RTL IPs through RTL-to-TLM Abstraction and TLM Synthesis;2012 13th International Workshop on Microprocessor Test and Verification (MTV);2012-12
2. Reuse of System-Level Validation Efforts;System-Level Validation;2012-09-25
3. Using Dynamic Runtime Testing for Rapid Development of Architectural Simulators;International Journal of Parallel Programming;2012-07-28
4. Automatic RTL Test Generation from SystemC TLM Specifications;ACM Transactions on Embedded Computing Systems;2012-07
5. HIFSuite: Tools for HDL code conversion and manipulation;2010 IEEE International High Level Design Validation and Test Workshop (HLDVT);2010-06