Funder
H2020 European Research Council
FWO
Natural Science and Engineering Research Council of Canada
NUDT
Science and Technology Innovation Project of Hunan Province
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software
Cited by
5 articles.
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1. Collaborative Coalescing of Redundant Memory Access for GPU System;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
2. Design Of Low Area Interconnect Architecture for CPU-GPU Network-On-Chips (NoCs);2023 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT);2023-07-14
3. LARA: Locality-aware resource allocation to improve GPU memory-access time;The Journal of Supercomputing;2021-05-15
4. Shared Buffer Crossbar Architecture for GPU-CPU;Lecture Notes in Electrical Engineering;2021
5. Selective Replication in Memory-Side GPU Caches;2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO);2020-10