Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology-Reference-Cited by-同舟云学术

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Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology

Published:2022-04-21 Issue: Volume: Page:
ISSN:
Container-title:2022 32nd International Conference Radioelektronika (RADIOELEKTRONIKA)
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Author:

Nagy Lukas¹,Arbet Daniel¹,Kovac Martin¹,Potocny Miroslav¹,Sovcik Michal¹,Stopjakova Viera¹

Affiliation:

1. Institute of Electronics and Photonics, Slovak University of Technology,Faculty of Electrical Engineering and Information Technology,Bratislava,Slovakia

Funder

Slovak Research and Development Agency

Ministry of Education, Science, Research and Sport of the Slovak Republic

Electronic Components and Systems for European Leadership Joint Undertaking

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9764897/9764898/09764953.pdf?arnumber=9764953

Reference8 articles.

1. A low-noise self-calibrating dynamic comparator for high-speed ADCs

2. Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator

3. Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology

4. An ultra-low voltage comparator with improved comparison time and reduced offset voltage

5. Matching properties of MOS transistors

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1. An Extremely Low-voltage Floating Gate Artificial Neuron;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

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