Efficient Online Self-Checking Modulo 2^n+1 Multiplier Design-Reference-Cited by-同舟云学术

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Efficient Online Self-Checking Modulo 2^n+1 Multiplier Design

Published:2011-09 Issue:9 Volume:60 Page:1354-1365
ISSN:0018-9340
Container-title:IEEE Transactions on Computers
language:
Short-container-title:IEEE Trans. Comput.

Author:

Wonhak Hong ,Modugu R.,Minsu Choi

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Link

http://xplorestaging.ieee.org/ielx5/12/5962399/05962404.pdf?arnumber=5962404

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Adder-Only Reverse Converters for 5-Moduli Set {2 ^q , 2 ^q − 1, 2 ^{q
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2. Self-Checking Hardware Design for Montgomery Exponentiation-Based Cryptography;IEEE Access;2024

3. Realization of High Performance Approximate Multipliers for FPGA Application;2023 International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI);2023-04-19

4. AN-HRNS: AN-Coded Hierarchical Residue Number System for Reliable Neural Network Accelerators;2022 IEEE 31st Asian Test Symposium (ATS);2022-11

5. Self-Checking Residue Number System for Low-Power Reliable Neural Network;2019 IEEE 28th Asian Test Symposium (ATS);2019-12

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