Real-time efficient FPGA implementation of aes algorithm
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6745905/6749643/06749688.pdf?arnumber=6749688
Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. FPGA Acceleration of AES Algorithm for High-Performance Cryptographic Applications;International Journal of Information technology and Computer Engineering;2024-06-03
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3. A compact and efficient AES-32GF for encryption in small IoT devices;MethodsX;2023-12
4. A multithread AES accelerator for Cyber-Physical Systems;Proceedings of the 20th ACM International Conference on Computing Frontiers;2023-05-09
5. Implementation of a Hybrid Triple-Data Encryption Standard and Blowfish Algorithms for Enhancing Image Security in Cloud Environment;Journal of Computer and Communications;2023
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