An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor-Reference-Cited by-同舟云学术

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An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor

Published:2012-09 Issue: Volume: Page:
ISSN:
Container-title:2012 IEEE International SOC Conference
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Author:

Otsuga Kazuo,Onouchi Masafumi,Igarashi Yasuto,Ikeya Toyohito,Morita Sadayuki,Ishibashi Koichiro,Yanagisawa Kazumasa

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6387373/6398324/06398369.pdf?arnumber=6398369

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2. Design of High Performance Hybrid Type Digital-Feedback Low Drop-Out Regulator Using SSCG Technique;IEEE Access;2021

3. A Nano-Power 0.5 V Event-Driven Digital-LDO with Fast Start-Up Burst Oscillator for SoC-IoT;Journal of Low Power Electronics and Applications;2020-12-01

4. A comparative study of digital low dropout regulators;Journal of Semiconductors;2020-11-01

5. A Fast Transient Response Digital LDO with a TDC-Based Signal Converter;Electronics;2020-01-10

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