Area and power analysis of adiabatic 2×1 multiplexer design on 65nm CMOS technology-Reference-Cited by-同舟云学术

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Area and power analysis of adiabatic 2×1 multiplexer design on 65nm CMOS technology

Published:2016-10 Issue: Volume: Page:
ISSN:
Container-title:2016 5th International Conference on Wireless Networks and Embedded Systems (WECON)
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Author:

Sharma Anjali,Sohal Harsh,Sharma Kulbhushan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7985066/7993415/07993489.pdf?arnumber=7993489

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