Author:
Nakasato Naohito,Daisaka Hiroshi,Ishikawa Tadashi
Cited by
2 articles.
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1. Accelerating 128-bit Floating-Point Matrix Multiplication on FPGAs;2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2023-05
2. Accurate Matrix Multiplication on Binary128 Format Accelerated by Ozaki Scheme;50th International Conference on Parallel Processing;2021-08-09