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An Erase Efficiency Boosting Strategy for 3D Charge Trap NAND Flash

  • Published:2018-09-01 Issue:9 Volume:67 Page:1246-1258
  • ISSN:0018-9340
  • Container-title:IEEE Transactions on Computers
  • language:
  • Short-container-title:IEEE Trans. Comput.

Author:

Chen Shou-HanORCID,Chang Yuan-HaoORCID,Liang Yu-Pei,Wei Hsin-WenORCID,Shih Wei-KuanORCID

Funder

Ministry of Science and Technology, Government of the People’s Republic of Bangladesh

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

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