A Variation-Aware CMOS Platform for Multi-Level Memristor Characterisation
Author:
Affiliation:
1. Imperial College,Department of Electrical and Electronic Engineering,London,UK,SW7 2BT
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10615233/10615286/10615592.pdf?arnumber=10615592
Reference21 articles.
1. A multilevel memristor–CMOS memory cell as a ReRAM
2. A Multi-level Memristor Based on Al-Doped HfO2 Thin Film
3. Memristor based on two-dimensional titania nanosheets for multi-level storage and information processing
4. Investigation and Manipulation of Different Analog Behaviors of Memristor as Electronic Synapse for Neuromorphic Applications
5. Multilevel artificial electronic synaptic device of direct grown robust MoS2 based memristor array for in-memory deep neural network
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