Testing Inter-Chiplet Communication Interconnects in a Disaggregated SoC Design

Author:

Abdennadher Salem

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Hardware Architecture of the Universal High-Speed Interconnection Chiplet for Chiplet Integration;2024 9th International Conference on Computer and Communication Systems (ICCCS);2024-04-19

2. Multi-Chiplet Implementation of a Replaceable Integrated Chiplet (PINCH) Assembly;IEEE Transactions on Components, Packaging and Manufacturing Technology;2024-03

3. Chiplets for Integration of Electronic Systems;IETE Journal of Education;2024-02-15

4. Chiplet Communications (Bridges);Flip Chip, Hybrid Bonding, Fan-In, and Fan-Out Technology;2024

5. An Improved Test Structure of Boundary Scan Designed for 2.5D Integration;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20

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