Accelerating Concurrent Priority Scheduling Using Adaptive in-Hardware Task Distribution in Multicores
Author:
Funder
National Science Foundation
Semiconductor Research Corporation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Hardware and Architecture
Link
https://ieeexplore.ieee.org/ielam/10208/9313849/9296734-aam.pdf
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Multi Bucket Queues: Efficient Concurrent Priority Scheduling;Proceedings of the 36th ACM Symposium on Parallelism in Algorithms and Architectures;2024-06-17
2. Energy-Efficient Scheduling Based on Task Migration Policy Using DPM for燞omogeneous MPSoCs;Computers, Materials & Continua;2023
3. An Optimal DPM Based Energy-Aware Task Scheduling for Performance Enhancement in Embedded MPSoC;Computers, Materials & Continua;2023
4. ALTOCUMULUS: Scalable Scheduling for Nanosecond-Scale Remote Procedure Calls;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10
5. A scalable architecture for reprioritizing ordered parallelism;Proceedings of the 49th Annual International Symposium on Computer Architecture;2022-06-11
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