Author:
Jain Abhishek Kumar,Omidian Hossein,Fraisse Henri,Benipal Mansimran,Liu Lisa,Gaitonde Dinesh
Cited by
14 articles.
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1. A DRAM Bandwidth-Scalable Sparse Matrix-Vector Multiplication Accelerator with 89% Bandwidth Utilization Efficiency for Large Sparse Matrix;2023 IEEE Asian Solid-State Circuits Conference (A-SSCC);2023-11-05
2. Accelerating SpMV on FPGAs Through Block-Row Compress: A Task-Based Approach;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04
3. Spica: Exploring FPGA Optimizations to Enable an Efficient SpMV Implementation for Computations at Edge;2023 IEEE International Conference on Edge Computing and Communications (EDGE);2023-07
4. Modular and Lean Architecture with Elasticity for Sparse Matrix Vector Multiplication on FPGAs;2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2023-05
5. Maia: Matrix Inversion Acceleration Near Memory;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08