A Survey on Floating Point Arithmetic Units for Non-Linear Application
Author:
Affiliation:
1. Yeshwantrao Chavan College of Engineering,Electronics Engineering,Nagpur,Maharashtra,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10093235/10093239/10093408.pdf?arnumber=10093408
Reference12 articles.
1. Floating-Point Inverse Square Root Algorithm Based on TaylorSeries Expansion;wei;IEEE Trans Circuits Syst I Exp Briefs,2021
2. Efficient Multiple-Precision Floating-Point Fused Multiply-Add with Mixed-Precision Support
3. Implementation of single precision conventional and fused floating point add-sub unit using Verilog
4. Design of Floating-Point Arithmetic Unit for FPGA with Simulink®
5. HUB Floating Point for Improving FPGA Implementations of DSP Applications
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