An efficient hardware implementation of DWT and IDWT
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Allied Publishers Pvt. Ltd
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http://xplorestaging.ieee.org/ielx5/8975/28487/01273240.pdf?arnumber=1273240
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Low Power Area Efficient Improved DWT and AES Architectures for Secure Image Coding;Lecture Notes in Electrical Engineering;2020
2. Embedded Implementation of Early Started Hybrid Denoising Technique for Medical Images with Optimized Loop;Advances in Intelligent Systems and Computing;2019-07-17
3. A generic, configurable and efficient architecture for first and second generation discrete wavelet packet transform with ultra-high speed and low-cost FPGA implementation;TECHNOLOGIES AND MATERIALS FOR RENEWABLE ENERGY, ENVIRONMENT AND SUSTAINABILITY: TMREES19Gr;2019
4. High throughput configurable architecture based on IDWPT/DWPT for impulse radio wireless communications;AIP Conference Proceedings;2019
5. Early Started Hybrid Denoising Technique for Medical Images;Recent Trends in Signal and Image Processing;2018-05-10
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