FPGA implementation of a subspace tracker based on recursive unitary esprit algorithm-Reference-Cited by-同舟云学术

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FPGA implementation of a subspace tracker based on recursive unitary esprit algorithm

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Container-title:2004 IEEE Region 10 Conference TENCON 2004.
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Author:

Boonyanani P.,Tan-a-ram S.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/9709/30646/01414478.pdf?arnumber=1414478

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Fast Real-World Implementation of a Direction of Arrival Method for Constrained Embedded IoT Devices;Proceedings of the 12th International Conference on the Internet of Things;2022-11-07

2. Investigating SAMV Regarding its Suitability For FPGAs;2022 IEEE 35th International System-on-Chip Conference (SOCC);2022-09-05

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