A fractional sample rate conversion filter for a software radio receiver on FPGA
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7005044/7021863/07022456.pdf?arnumber=7022456
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Design and FPGA implementation of a high-speed transposed Farrow structure for arbitrary resampling in digital receivers;2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME);2023-06-18
2. A Fractional Sample Rate Converter with Parallelized Multiphase Output: Algorithm and FPGA Implementation;Journal of Signal Processing Systems;2022-06-17
3. A survey of digital down converter architecture for next generation wireless applications;IOP Conference Series: Materials Science and Engineering;2020-06-01
4. FPGA implementation of high performance digital down converter for software defined radio;Microsystem Technologies;2019-08-13
5. Design and implementation of real-time wideband software-defined radio applications with GPGPUs;Concurrency and Computation: Practice and Experience;2018-07-17
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