Comprehensive Analysis of the Impact of via Design on High-Speed Signal Integrity
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4455348/4469670/04469746.pdf?arnumber=4469746
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Segmented Cavity Design for Suppression of Cavity-to-Via Coupling in High-Speed Transmission Lines of Multi-Layer Printed Circuit Boards;2024 IEEE 28th Workshop on Signal and Power Integrity (SPI);2024-05-12
2. Signal Integrity Analysis and Optimization of DDR Interconnect Design;2024 IEEE International Conference on Consumer Electronics (ICCE);2024-01-06
3. Signal integrity aspect of High Speed Interface Routing in multilayered PCB environment;2023 IEEE Microwaves, Antennas, and Propagation Conference (MAPCON);2023-12-11
4. Bayesian Exploration Imitation Learning-Based Contextual via Design Optimization Method of PAM-4-Based High-Speed Serial Link;IEEE Transactions on Electromagnetic Compatibility;2023-12
5. Efficient 3D Modeling Methodology for High-Speed Channels;2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID);2023-01
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