Constraint-based watermarking techniques for design IP protection

Author:

Kahng A.B.,Lach J.,Mangione-Smith W.H.,Mantik S.,Markov I.L.,Potkonjak M.,Tucker P.,Wang H.,Wolfe G.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 116 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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3. Paired 2-disjoint path covers of k-ary n-cubes under the partitioned edge fault model;Journal of Parallel and Distributed Computing;2024-08

4. FSMLock: Sequential Logic Locking Through Encryption;2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES);2024-06-27

5. SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12

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